Digital Polar Transmitter (DPTX) architectures provide a reduced size and reduced power consumption in comparison to conventional analog radio transmitter architectures. A DPTX architecture includes two main functional blocks. One main functional block is a Digital-to-Time Converter (DTC) that modulates a local oscillator (LO) carrier with phase information of a signal that is to be transmitted. The other main functional block is a Digital Power Amplifier (DPA) that modulates the amplitude of the signal that is to be transmitted onto the phase-modulated LO signal, thereby generating a reconstruction of the original signal (e.g., the signal to be transmitted).
A major technical challenge for DPTX architectures is to handle the wideband signals that are associated with modern communication protocols, such as IEEE 802.11 ac (commonly referred to as WiFi, and having a signal bandwidth of about 20-160 MHz), and Long Term Evolution (commonly referred to as 4G LTE, and having a signal bandwidth of about 10-40 MHz). These wide bandwidth signals are hard for DPTX architectures to handle because the bandwidths of the separate phase signal and the amplitude signal can respectively be about ten times and about three times greater than the bandwidth of the protocol signal. Another challenge for DPTX architectures comes from co-existence requirements associated with a small form-factor for multi-protocol communications devices in which DPTX are used. In order to avoid desensitizing the receiver of such devices, the noise floor requirements can pose strict constraints on the quantization noise level of the DTC and DPA of the DPTX.
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